Construction of Residue Number System Using Hardware Efficient Diagonal Function

Maria Valueva,Georgii Valuev,Danil Bogaevskiy,Nataliya Semyonova,Nikolay Chervyakov,Pavel Lyakhov,Dmitry Kaplun

doi:10.3390/electronics8060694

Maria Valueva, Georgii Valuev + Show 5 more

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https://doi.org/10.3390/electronics8060694

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Abstract

The residue number system (RNS) is a non-positional number system that allows one to perform addition and multiplication operations fast and in parallel. However, because the RNS is a non-positional number system, magnitude comparison of numbers in RNS form is impossible, so a division operation and an operation of reverse conversion into a positional form containing magnitude comparison operations are impossible too. Therefore, RNS has disadvantages in that some operations in RNS, such as reverse conversion into positional form, magnitude comparison, and division of numbers are problematic. One of the approaches to solve this problem is using the diagonal function (DF). In this paper, we propose a method of RNS construction with a convenient form of DF, which leads to the calculations modulo 2 n , 2 n − 1 or 2 n + 1 and allows us to design efficient hardware implementations. We constructed a hardware simulation of magnitude comparison and reverse conversion into a positional form using RNS with different moduli sets constructed by our proposed method, and used different approaches to perform magnitude comparison and reverse conversion: DF, Chinese remainder theorem (CRT) and CRT with fractional values (CRTf). Hardware modeling was performed on Xilinx Artix 7 xc7a200tfbg484-2 in Vivado 2016.3 and the strategy of synthesis was highly area optimized. The hardware simulation of magnitude comparison shows that, for three moduli, the proposed method allows us to reduce hardware resources by 5.98–49.72% in comparison with known methods. For the four moduli, the proposed method reduces delay by 4.92–21.95% and hardware costs by twice as much by comparison to known methods. A comparison of simulation results from the proposed moduli sets and balanced moduli sets shows that the use of these proposed moduli sets allows up to twice the reduction in circuit delay, although, in several cases, it requires more hardware resources than balanced moduli sets.

Highlights

The residue number system (RNS) is a non-positional number system that allows large length numbers to be presented as numbers in independent bits of a small length, which enables computations and the organizing of their parallelisms to be sped up
The 3.goal of modeling is a comparison of the methods of implementing the numbers comparison operation and RNS tois binary conversion by the proposed methods, method based on Thereverse goal of modeling a comparison of the methods of implementing the numbersa comparison operation and reverse to binary conversion by the proposed methods, a method based on Chinese remainder theorem (CRT)
CRT [18] and a method based on CRT with fractional values (CRTf) [21]

Summary

Introduction

The residue number system (RNS) is a non-positional number system that allows large length numbers to be presented as numbers in independent bits of a small length, which enables computations and the organizing of their parallelisms to be sped up. The use of short numbers in RNS computations can significantly reduce the power consumption of digital devices [1]. It is useful in the synthesis of RNS computational devices with parallel structure, Electronics 2019, 8, 694; doi:10.3390/electronics8060694 www.mdpi.com/journal/electronics. Electronics 2019, 8, 694 such as field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC). All these attractive features increase interest to RNS in the areas where large amounts of computation are needed. A new method based on the Chinese remainder theorem (CRT) is proposed for absolute position computation in [12]

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