Abstract
An RF energy scavenging circuit implementing a power matched Villard voltage doubler followed by a switched capacitor DC-DC converter for scavenging ultra-low RF power levels (<−20 dBm) is presented. Measurement results for the circuit, fabricated in a 130 nm CMOS process, show that 1V can be generated across a 5 MΩ load from as little as −25.5 dBm of input RF energy at 2.2 GHz. This represents a 9.5 dB improvement, over the measured sensitivity of our RF energy scavenging circuit without the use of a switched capacitor DC-DC converter stage.
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