A fully integrated multiphase switched-capacitor DC-DC converter with PFM control and charge sharing loss reduction

Abstract

A fully integrated high efficiency switched-capacitor (SC) DC-DC converter with pulse frequency modulation (PFM) control is presented. The small signal model of the multiphase-interleaving SC converter is given and it is verified through the simulation and the measurement results. For high efficiency, this design set the dominant pole at the output of the error amplifier (EA) and the 14-phase interleaving topology can push the non-dominant pole away from the Unit Gain Frequency (UGF) for the loop stability. By combining the flying-well and the deep n-well (DNW) isolation techniques, the proposed high-density MOS capacitor can reduce both the parasitic loss and the charge sharing loss of the converter. The conversion ratio of the converter is 2:1 under 3.3V power supply. This SC DC-DC converter is fabricated in the 40 nm CMOS process. It obtains the peak efficiency of 86.2% and the output power-density of 226 mW/mm2. It maintains the efficiency above 80% from 8 mA to 50 mA load condition.