RF and analogue performance investigation of DG tunnel FET

Abstract

In this letter, the analogue and RF performance of a silicon double-gate tunnel FET (DGTFET) is reported. With the help of a device simulator, the variation of different analogue and RF device performance parameters are investigated, such as transconductance-to-drain-current ratio (gm/Id), intrinsic gain (gm/gds), cut-off frequency (fT), and maximum frequency of oscillation (fmax) as a function of channel length, are studied. Our results show that the reduction of channel length results in an improvement in the RF performance parameters of the device and deterioration of the analogue performance parameters of the device, clearly indicating a necessary design trade-off between the RF (bandwidth) and analogue performances (power efficiency). The investigation presented here exhibits a valuable result that the DGTFET devices with optimised gate length are suitable for low-power analogue and RF applications.