Abstract
The theoretical limit of sub-threshold swing ( SS ) in the n-type piezoelectric FinFET (Piezo-FinFET) is thoroughly investigated. Gate voltage modulated strain, conduction band edge shift, and the SS are evaluated utilizing physics-based modeling and numerical simulation, indicating a strong dependence of SS on the fin width, crystalline orientation, and physical properties of the piezo-material used in the gate stack. For [001] Si and [111] Ge Piezo-FinFETs with 5-nm fin width and 3-nm PZT-5H thickness, SS values down to 40 mV/decade are achievable after design optimizations. A figure of merit, ${E}_{\text{cr}} {d}_{z3}/{S}_{\text{pie}, 33}$ , is proposed for the piezo-materials in terms of the critical electric field ( ${E}_\text{cr}$ ), the piezoelectric strain constant ( ${d}_{z3}$ ), and the elastic compliance constant ( ${S}_{\text{pie}, 33}$ ), to guide the Piezo-FinFET designs.
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