Reversible Realization of N-bit Arithmetic Circuit for Low Power Loss ALU Applications

Abstract

Today, low loss efficient digital calculating systems are among the key focus of researchers. Fast and efficient processing parts are in the concrete demands of this era. Reversible digital design approach is directed towards this need of efficient electronic system design. Arithmetic circuits are considered as the main part of any digital calculating system. Designing of these arithmetic subsystems using reversible design approach leads to the generation of low power loss efficient electronic systems. In this paper, we have proposed a novel approach to design n-bit arithmetic circuit with reversible design approach. This proposed design is compared with existing designs on the basis of some selected performance parameters. Comparison and analysis of these designs show that proposed design is the most optimized approach for reversible realization of arithmetic circuit for low power Arithmetic logic unit (ALU) circuit applications. The proposed model can be used for reversible design of digital computing systems for low power ALU designs.