Design and Modeling of Power Efficient, High Performance 32-bit ALU through Advanced HDL Synthesis

Abstract

Arithmetic and Logic Unit (ALU) is a combination circuit that performs a number of arithmetic and logical operations within a microprocessor.We present guidelines for low- and ultra low-power & high performance 32- bit ALU [1] units and analyze structures for logical operations to determine the most suitable for these regions of operations for low power applications.An ALU design is then modeled in VHDL for further testing with pre-manufactured parts of the 32 bit ALU using XILINX ISE tools. A novel method that chooses better designs of flipflops and latches in different places of the data path, based on the data and clock activities.Our simulation results indicate that, for the 180nm-65nm CMOS technologies [6] it is possible to reduce the ALU total energy by 18%-24%, with minimal delay degradation. In addition, there is up to 22%-32% reduction in leakage power in the standby mode.