Abstract

It is necessary to study fault tolerant techniques for nanotechnology since nanometer devices are very sensitive to system and environment influences. In this paper, we present a novel fault tolerant technique for nanocomputers, namely, XOR multiplexing based on redundancy-modified NAND gates. The error distributions and fault tolerant ability of the proposed architecture are analyzed and compared them with von Neumann’s multiplexing. Experimental results show that compared with conventional multiplexing technique based on NAND gate, the new system has a much higher fault tolerant ability. According to the evaluation, by using multiple redundant components, the device error tolerant ability of the proposed architecture can up to the 10−1. In unreliable nanometer-scale devices-based systems, this architecture is potentially effective against the increasing transient errors.

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