RETRACTED ARTICLE: Divide and compress discrete cosine lossless compression coder to reduce dimensionality of test data

Abstract

The increasing test data volume is considered as a biggest challenge in circuit under test. This challenge leads to higher computational complexity associated with the testing circuits. To reduce the testing time and addresses the problem related to high overhead, high fault coverage andincreased power dissipationmethod is used in system-on-chip (SoC). A new test compression method called divide and compress (D&C) lossless compression coder with Discrete Cosine Transformis used to enhance the compression capability. This framework of D&C lossless compression coder combines the lossless and lossy compression methods. The Discrete Cosine Transform (DCT) manipulates each data bit inside file and this reduces the file size without any data loss after decoding to lossless compression.Depending on the data characteristic, the compression of data is done without any loss in data. Further, the decompression is attained using advanced Finite State Machine (FSM) to reduce overhead. The experimental results on large benchmark circuits like ITC’99 and ISCAS’99 proves that the proposed D&C lossless compression attains reduced testing time and better compression ratio. Further, itlays only soft burden on the hardware.