Abstract

The study describes the results of research carried out into the design of a parallel and resource-efficient solution to the real-data polyphase discrete Fourier transform (DFT), or PDFT. The solution is able to exploit both the real-valued nature of the data and the parallel processing capabilities of the computing technology - assumed to be a field-programmable gate array - to yield a solution with a low size, weight and power requirement. A parallel computing architecture has been devised, based upon batch processing, whereby pipelined operation of the polyphase filter bank (PFB) is achieved using shared resources and pipelined operation of the real-data DFT using the resource-efficient regularised fast Hartley transform (RFHT). The PFB outputs are appropriately re-ordered for input to the RFHT by means of a suitably defined finite state machine. The resulting design, which includes a flexible up-sampling capability (with rational over-sampling factor) to address the problem of adjacent channel interference, trade-off time complexity against space complexity in order to satisfy the associated timing constraints. The solution is also scalable, in terms of the number of channels, so that it might be easily adapted, for new or multiple applications, at minimal re-design effort and cost.

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