Abstract
In this paper, we consider allocation of resources within a multistage buffered crossbar switch with internal credit-based flow control in order to support quality of service objectives for different traffic classes in the Internet. Specifically, we assume there are a collection of classes of service, each characterized by a strict delay upper bound that applies across all packets of the class. Each class has a set of flows, where each flow entering the switch is characterized by an arrival curve, and the switch must achieve the delay objectives subject to the arrival curves. We develop an approach that can be used to determine the amount of bandwidth and number of credits that must be allocated inside the buffered crossbar switch in order to guarantee the delay requirements. We first analyze the flow control system in the single-stage buffered crossbar switch, which is the building element of a multistage buffered crossbar switch, to develop a technique for determining the required amount of resource in a single-stage switch. We calculate the required amount of bandwidth to guarantee a delay upper bound, and find that the required number of credits to achieve this bandwidth is at least the product of this bandwidth and the total round-trip latency of the credit circulation loop. This round-trip latency includes not only round-trip propagation delay but also the latency parameters of the scheduling algorithms used at ingress and egress ports of the switch. Then we extend this technique to study the resource allocation in a multistage buffered crossbar switch, for which we assume a three-stage Beneš architecture. We first consider the multistage flow control system that treats a traffic class from an ingress port to an egress port of the multistage switch as an end-to-end flow. We determine the required amount of bandwidth for such a flow to guarantee its delay requirement and find that the number of credits that must be allocated to this flow at each stage is at least the product of this bandwidth and the total round-trip latency of the credit circulation loop at that stage. We find that more bandwidth and credits must be allocated in a multistage switch than in a single-stage switch to guarantee the same delay objective when the propagation delay cannot be ignored, and this increase in the required amount of resources is non-trivial unless delay requirement is large. In this paper we also consider an alternative flow control scheme that aggregates traffic destined to specific cross-point buffers of the following stage into logical queues at the output of each stage. We determine the required amount of bandwidth and the number of credits at each stage to guarantee the delay budget at that stage, and find that logical traffic aggregation can reduce the required amount of resources. We provide numerical examples that illustrate the application of our techniques.
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