Abstract
Flexible printed circuit (FPC) are widely used as connectors in compact package such as cellular telephones where required high performance. The increasing number of constrains makes manual routing an extremely complicated and time-consuming task. In this paper, we present a resource allocation framework which employs computational geometry considering signal and power integrity (SI/PI). To perform a reasonable resource allocation, we propose an escape-triangle-passage model (ETP model) based on constrained Delaunay triangulation (CDT). Experimental results on some industrial data show our strategy assembled routing channel for each group of nets has good robustness and is suitable for irregular polygonal routing region, significantly improving the routing quality and reducing iteration times.
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