Abstract

In this chapter, an exhaustive analysis of the impact of resistive-open defects in core-cells of SRAMs is presented with particular emphasis on dynamic faults. Resistive-open defects appear frequently in VDSM technologies and induce a modification of the timing within the memory (delay faults). Among the faults induced by such resistive-open defects, there are static and dynamic Read Destructive Faults (RDFs), Deceptive Read Destructive Faults (DRDFs), Incorrect Read Faults (IRFs), Transition Faults (TFs), and static and dynamic Data Retention Faults (DRFs). Each of them requires specific test conditions, and several March tests are needed to cover all these faults. The first part of the chapter presents an electrical analysis and characterization of the core-cell, with the identification of fault models related to resistive-open defects in the core-cell. In the following, the state of the art of March procedures for the test of all core-cell dynamic faults is presented. The last section of the chapter discusses the impact of technology scaling on the failures induced by resistive-open defects in the core-cells.

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