Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits

Abstract

This paper presents a fast residue checker for the error detection of arithmetic circuits. The residue checker consists of a number of residue arithmetic circuits such as adders, multipliers and binary-to-residue converters based on radix-two signed-digit (SD) number arithmetic. The proposed modulo m (m = 2p ± 1) adder is designed with a p-digit SD adder, so that the modulo m addition time is independent of the word length of operands. The modulo m multiplier and binary-to-residue number converter are constructed with a binary tree structure of the modulo m SD adders. Thus, the modulo m multiplication is performed in a time proportional to log 2 p and an n-bit binary number is converted into a p-digit SD residue number, n ≫ p, in a time proportional to log 2(n/p). By using the presented residue arithmetic circuits, the error detection can be performed in real-time for a large product-sum circuit.