Fast residue arithmetic multipliers based on signed-digit number system

Abstract

Fast residue arithmetic multipliers based on a radix-2 signed-digit (SD) number are presented. For a given modulus m, 2/sup p/-1/spl les/m/spl les/ 2/sup p/+2/sup p-1/-1, in a residue number system (RNS), the modulo m addition is performed by using one or two p-digit SD adders, and the modulo m addition time is independent of the word length of operands. We propose two kinds of modulo m multipliers which are constructed using a modulo m SD adder and a binary tree of the adders and the modulo m multiplication are performed in a time proportional to p and log/sub 2/p, respectively. 16-digit residue arithmetic multiplier circuits have been designed using VHDL, and the results show that high speed residue arithmetic circuits can be implemented.