Research on High-speed PCB Design Based on Signal Integrity Analysis

Abstract

With the development of manufacturing techniques and hardware devices, the need for high-speed chips is bursting. As a review report, we analyze the fundamentals and latest progress of modeling, analysis, and design technologies for signal integrity and electromagnetic compatibility on PCB and package in the past decades. Most results in this area are very rich and highly education during his long scientific career based on Professor Clayton Paul's literary creation also consider the inclusion variability of parameters, it is shown how statistical simulation can be affordable by the recently introduced stochastic method. As the final conclusion, we take into consideration of the necessity of practical training of designers and an experience relying on realistic PCB demonstrators is illustrated and discussed. Introduction Electromagnetic compatibility and signal integrity are one of crucial technologies in the future for electronic product design. The main reasons are high data bandwidth demand for next generation high performance computing (100+ Gbps), cloud communication/computing (50+ Gbps), and client devices (20+ Gbps). EMC and SI technologies on PCB or package will be one of the bottlenecks to achieve such high data bandwidth. Clayton Paul a few EMC and SI field has made a pioneering contribution. He condensed the basic theory and requires knowledge of the EMC and SI two masterpiece design book [1], [2]; and then, in more recent times, he published a series of more books [3], especially the design of high speed digital system. This information not only guided electromagnetic compatibility and PCB in the past few decades, some new techniques of silicon research direction and inspiration, but at present still unmatched, many years of electronic systems development influence. In this paper, the fundamentals and latest progress of EMC and SI design technologies on PCB are overviewed. In addition, methods and tools for the simulation of a circuit, with the inclusion of parameters’ variability effects on its electrical behavior, are needed to avoid very expensive re-fabrication. Finally, EMC engineering education is a fundamental step to achieve well-designed and performing devices. “Seeing is believing” particularly applies to design for EMC, where most effects are felt as “black magic” and teaching using only texts and equations is insufficient. The IEEE EMC Education Manual proved to be a powerful tool for teaching practical skills and Clayton Paul was a great contributor for the EMC community also in this respect. Link-path Model and Differential Signal Link-path Modeling and Analysis. A link path includes a whole electrical interconnect starting from a chip sending a signal and terminating at a chip receiving the signal. Signal integrity can be if the link path can be represented as a lossless transmission line to maintain perfect. In reality, the link path usually consists of several different conductor geometry. Figure 1 shows an example of a link path. It begins with a transmitter chip, through the micro convex, the package substrate, BGA ball, holes or stripline, microstrip circuit board, and at the end of the receiver chip. The signals will be distorted both in amplitude and timing due to the nonideal effects of the link path, such as frequency-dependent loss of package and PCB substrate, impedance variance, crosstalk coupling, etc. An eye diagram is a common way for evaluating the quality of signals propagating on a link path. It is constructed by slicing a long stream of Pseudo-Random Bit Sequences (PRBS) and superimposing