Abstract
Modular multilevel converter-based high voltage direct-current (MMC-HVDC) transmission has developed rapidly because of its flexibility, reliability and efficiency. DC circuit breaker (DCCB) is one of the key equipments to ensure the safe and stable operation of MMC-HVDC power grids. In this paper, we investigate a novel topology of DC circuit breaker based on artificial current zero-crossing. The proposed DC circuit breaker can effectively limit the magnitude and rise rate of fault current at the converter station side and reduce the impact of DC fault on the converter devices. The principle and operation sequence of this topology are described. Meanwhile, the breaking process of the DC fault is analyzed theoretically and the considerations for parameter design are presented. Finally, the system model of DC circuit breaker and a four-terminal MMC-HVDC test system are built in PSCAD/EMTDC. The simulation results show that the proposed DC circuit breaker is effective for quick breaking after fault.
Highlights
MMC-HVDC power transmission technology based on power electronics is widely used in power supply and grids and has become the focus of research
Various topologies of hybrid DC circuit breakers have been proposed [22]–[30], and most of these topologies have common features: The fault current cannot be effectively limited, a large amount of fault energies will be dissipated by the surge arrester, and high cost of full-controlled semiconductors
A current limiting inductance of 200 mH is set at both ends of each line, which is integrated in the DC circuit breaker (i.e. L1 and L2)
Summary
MMC-HVDC power transmission technology based on power electronics is widely used in power supply and grids and has become the focus of research. Various topologies of hybrid DC circuit breakers have been proposed [22]–[30], and most of these topologies have common features: The fault current cannot be effectively limited, a large amount of fault energies will be dissipated by the surge arrester, and high cost of full-controlled semiconductors In other words, these DCCB must have enough fault interruption capability, the converters near the fault must withstand serious overcurrent, and the design of surge arrester in DCCB becomes critical. The proposed DCCB is based on thyristors, and has the advantages of effectively limiting fault current, fast reclosing, without full-controlled semiconductors and no additional pre-charging power supply It can be better applied in HVDC grids. Ia is the threshold of fault current detection; uC1, iC1, uC2, iC2 are corresponding capacitors’ voltage and current; uK is the voltage of K , the total voltage of K and L0 (i.e., the difference value between uC1 and uC2) is recorded as u
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
