Abstract

The time interval measurement system with an average resolution of 65ps has been designed in an FPGA chip. The system combines direct pulse counting with digital interpolation using dedicated carry chain inside FPGA. In order to calibrate the time-to-digital converter (TDC), a statistics code density method is adopted. The paper particularly introduces the architecture of the system and the calibration of TDC. Experimental results show that the whole system can be operated simply and functions well.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call