Abstract

Wafer warpage of semiconductors in the manufacturing process is severe problem that decreases the quality and productivity. As the 3D NAND flash was developed, warpage became more important because the stack height increased. Some researches were carried out to expect the warpage using simulation. However, most studies have focused on the wafer-level regardless of the 3D NAND structures. It is very difficult to study the warpage with 3D NAND structures due to the inherent complexity. This paper presents simulation techniques to analyze warpage of the wafer-level. Equivalent material properties were obtained by using Representative Volume Element (RVE) model in this simulation. Wafer-level warpage predictions were analyzed and verified by comparing to experiment results. Finally, a sensitivity analysis was conducted to find the dominant factors affecting warpage. From this analysis, Young's modulus and thermal expansion coefficient were determined as dominant parameters of wafer warpage

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