Abstract

Plasma etching of polysilicon gate electrodes results in a degraded breakdown voltage for high perimeter, comb capacitor structures formed over p‐silicon. p‐Well structures with other geometric configurations and all n‐well capacitor structures do not show this degradation. A low temperature oxidation during temperature ramping in the source/drain implant anneal can repair the gate dielectric damage, increasing the comb capacitor breakdown voltage by up to 1.5 MV/cm. Polysilicon reoxidation treatments after gate etching can also restore comb capacitor breakdown voltage, but their application is limited by the need to avoid metal oxide semiconductor field effect transistor short channel degradation and undesired bipolar transistor current gain increase.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.