Novel Si/SiC heterojunction lateral double-diffused metal oxide semiconductor field effect transistor with low specific on-resistance by super junction layer

Abstract

A novel Si/SiC heterojunction lateral double-diffused metal oxide semiconductor (LDMOS) field effect transistor with the low specific on-resistance (Ron,sp) by super-junction (SJ) layer (Si/SiC SJ-LDMOS) is proposed in this paper. On the basis of using N-Buffer layer to solve substrate assisted depletion effect (SAD), breakdown point transfer terminal technology (BPT) is realized by the deep drain structure of Si/SiC heterojunction and electric field modulation is carried out, which further improves the breakdown voltage (BV) of Si/SiC SJ-LDMOS, alleviates the contradictory relationship between the BV and the Ron,sp. Through ISE TCAD simulation, the result shows that with the same drift region length of 20 μm, the BV is increased from 114 V of conventional SJ-LDMOS (Cov. SJ-LDMOS) and 270 V of SJ-LDMOS with N-Buffer layer (Buffer SJ-LDMOS) to 374 V of Si/SiC SJ-LDMOS, increased by 228% and 38%, respectively. In addition, the Ron,sp of Cov. SJ-LDMOS, Buffer SJ-LDMOS and Si/SiC SJ-LDMOS are 46.26 mΩ cm2, 26.96 mΩ cm2 and 25.85 mΩ cm2, respectively. Moreover, the figure-of-merit (FOM) of proposed Si/SiC SJ-LDMOS device is 5.411 MW/cm2, which means the Si/SiC SJ-LDMOS has a better performance to break the silicon limit. The influence of design parameters on device performance is also discussed.