Abstract
The epitaxial wafer with expensive manufacturing cost. For cost reduction, epitaxial layer should be thinner. Furthermore, non-epitaxial wafer with mature anneal technology in crystal growth to reduce defect existence, recently. Therefore, thin epitaxial layer and non-epitaxial wafers estimation are necessary in DRAM product related reliability properties. We focused on ESD susceptibility, tREF (refresh time) and Latch-up immunities characteristics on 60nm DRAM devices which using 2um P/P− epitaxial wafer and non-epitaxial wafer, respectively. From the evaluation results, we found ESD susceptibility without significantly variation for two types of wafer substrates. Latch-up immunity does not significantly degradation as epitaxial layer becomes thinner but non-epitaxial wafer with poor performance. tREF (refresh time) immunity showed non-epitaxial wafer are more failure bit counts than that of 2um epitaxial wafer.
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