Abstract
Recent developments in high-quality silicon varactors for low-noise parametric amplifiers and high-efficiency harmonic generators necessitate the use of epitaxial silicon layers that are thinner than 10 microns, with resistivity less than 1 Ω-cm. This paper extends Breitschwerdt's recent calculations [1] to such thin epitaxial layers, and also includes the calculation of series resistance and capacitance per unit area in a range useful for microwave diode design. A planar geometry for the junction has been assumed. The impurity distribution of the in-diffusion from the surface and the out-diffusion from the substrate are assumed to be complementary error functions. Depletion layer characteristics of the p-n junction-- including junction depth, impurity gradient at the junction, depletion layer width, capacitance per unit area, and avalanche breakdown voltage--are predicted for various epitaxial layer resistivities. The capacitance per unit area at breakdown is also presented in graphical form. Series resistance has been obtained by numerical integration of various impurity distributions. Zero-bias cutoff frequency for various layer thicknesses is presented graphically as a function of junction depth and breakdown voltage. The calculations predict that there are optimum diffusion conditions for maximum cutoff frequency and for maximum breakdown voltage with a given epitaxial layer thickness. They indicate that the optimum zero-bias cutoff frequency is nearly inversely proportional to the thickness of the epitaxial layer. For instance, the maximum cutoff frequency of a junction in a 2-µ layer can exceed 600 GHz compared with 300 GHz in a 4-µ layer, and 140 GHz in an 8-µ layer. Calculated and experimentally determined characteristics show reasonably good agreement.
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