Abstract
Smart power devices of the last generation are able to integrate a full electronic system, including logic and analog functions and power drivers, in a true single chip solution exploiting the advanced features made available by mixed BCD processes developed for this purpose. The complexity of the ICs and their applications together with the severe stress conditions which these devices can experience in the field makes the reliability assurance of the Smart Power ICs a very challenging task and for this purpose a complete approach is necessary combining an application oriented IC qualification methodology with structural evaluations to test the intrinsic reliability of the basic process elements. In this context the knowledge of the main failure mechanisms is fundamental both for an effective detection in qualification and for an early prevention during IC design.
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