Reliability of high-k gate stack on transparent gate recessed channel (TGRC) MOSFET

Abstract

This work discusses the effectiveness of high-k dielectric as gate stack in transparent gate recessed channel (TGRC) MOSFET having 20nm gate length. The main aim of this study is to analyse the reliability issues of TGRC MOSFET in terms of analog parameters. Results indicate that with the incorporation of HfO2 as gate stack on SiO2, on-current enhances significantly whereas leakage current (off-current) which hampers the device performance reduces appreciably and thus improves the switching ratio in comparison to Al2O3 and ZrO2 gate stack. This improvement is due to increment in physical oxide thickness which reduces the off current owing to reduced tunnelling and thereby improving the static power dissipation. However, it is also observed that HfO2 stacked TGRC exhibit improved device performance in contrast to other high-k materials. The observations are supported by the data presented in the results section. All the simulations are performed using TCAD tool ATLAS.