Abstract
We investigated relationship between threshold voltage shift (ΔV th) and hole and deep traps at Al2O3 insulator/In-Si-O-C interface for In-Si-O-C thin-film transistors (TFTs) with Al2O3 dielectric using an Al2O3 passivation layer under the negative gate bias stress (NBS) and negative gate bias illumination stress (NBIS) conditions. A large ΔV th of -4.7 V was observed in TFT without an Al2O3 passivation layer (w/o) due to the three components such as hole trap (-0.9 V) at around the valence band edge, deep trap (-0.7 V) and hole trap (-3.1 V) at around fermi-level generated by absorbed O2 molecule at Al2O3 insulator/In-Si-O-C interface. The influence of absorbed O2 molecule on ΔV th could be significantly suppressed up to approximately 45 % as an Al2O3 passivation layer increases from 0 to 10 nm.
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