Reliability investigations of large die wafer level package (part II): Impact of solder ball composition, die thickness, and polymer passivition on board level reliability

Abstract

Wafer level packaging (WLP) of electronic components has become increasingly popular in recent years. In WLP, the package size is the same as the die size and, therefore, the package size is the smallest possible. This is important for applications where maximum functionality is required in a small space, especially for mobile devices. This paper continues the work of a previous study where we investigated the temperature cycling on board (TCoB) and drop test on board (DT) reliability of a test vehicle based on a dummy wafer with 8 × 8 mm die size and 444 connections at 0.4 mm pitch [1]. The previous study focused on effects of varying the die, polymer dielectric, and redistribution trace thicknesses, and we observed improved performance in TCoB with thinner die and thicker polymer layers. We build on the previous study by investigating several other variables in the WLP structure and composition. For the design of experiments (DOE), we selected three different types of solder ball compositions, the two different polymer passivation materials, two different wafer thicknesses as well as two different polymer dielectric thicknesses. Samples were prepared for seven DOE cells in total. TCoB and DT reliability results were recorded and failure analysis performed on the early failure samples. From our investigations, we conclude that the best performing DOE legs for the large die test vehicle approach the reliability requirements which are common for the electronic components in the consumer and mobile product segments.