Abstract
For high performance applications like satellite receivers, Interleaved Successive-Approximation-Register (ISAR) Analog to Digital Converter (ADC) are widely used because they have good tradeoff between high performance sampling rate, effective resolution, power and small area in GHz range. Very few work is reported about the impact of aging induced degradation in SAR ADC. After presenting the design content, experimental results of aging at 40°C and 125°C are shown. Degradation of static and dynamic performance parameters will be illustrated. Then, the analysis of reliability for all the critical sub-blocks of the ADC is discussed, i.e. switches in capacitor array, comparator and latch. In conclusion, the sub-block which is mainly responsible for performance degradation is the latch.
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