Abstract

The relation between gold related levels in silicon is studied with deep level transient spectroscopy (DLTS) using linearly graded junctions. Since the depletion layer extends equally on both sides in the linearly graded junction, both the acceptor level in the upper half and the donor level in the lower half of the band gap are simultaneously monitored as majority-carrier traps. It is observed that the concentration of the acceptor level is about four times more than the donor level. The defect concentrations have been calculated using modified DLTS theory for linearly graded junctions where the influence of free-carrier tail has been properly considered for both the traps. The difference in concentrations indicates that the two deep levels originate from different configurations of the gold impurity in silicon.

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