Abstract
We investigated the relationship between the band-offset, the gate leakage current, and the interface states density on SiO2/4H-SiC (000-1) structures via hard x-ray photoelectron spectroscopy and electrical measurements. From the observed band-offset, we found that conduction band offset (ΔEc) depended on the oxidation procedure, but valence band-offset (ΔEv) did not. In addition, ΔEv was larger than ΔEc, indicating that electron tunneling was more predominant than hole tunneling. SiO2 prepared by a dry oxidation procedure exhibited the highest gate leakage current onset and the highest interface states density and the largest ΔEc, whereas a wet oxidation procedure produced the lowest gate leakage current onset, the lowest interface states density, and the smallest ΔEc. Oxygen annealing after wet oxidation effectively increased gate leakage current onset, which increased the interface states density and the ΔEc. These results were related to hydrogen atoms and carbon related defects at the SiO2/4H-SiC (000-1) interface.
Highlights
Silicon carbide (SiC) has attracted much attention due to its high breakdown voltage in high power systems.[1,2,3,4,5,6,7,8,9] Among wide bandgap semiconductors, SiC is advantageous to form insulating oxides
∆Ev was larger than ∆Ec, indicating that electron tunneling was more predominant than hole tunneling
From the C-V measurements, the dry oxidation could form the carbonrelated interface states located between 0.7-0.85 eV below CBM while hydrogen atoms incorporated during wet oxidation should passivate the interface states at the SiO2/4H-SiC (000-1) interface
Summary
Silicon carbide (SiC) has attracted much attention due to its high breakdown voltage in high power systems.[1,2,3,4,5,6,7,8,9] Among wide bandgap semiconductors, SiC is advantageous to form insulating oxides. SiO2 can be prepared on a SiC substrate by thermal oxidation procedures.[10–13] the high interface states density of SiO2/SiC devices leads to a low channel mobility.[14–18]. SiO2/SiC devices suffer a high gate leakage current.[19]. To improve the performance of SiO2/SiC devices, systematic experiments should be conducted on the band alignment of the SiO2/SiC interface, the oxidant, and oxidation temperature of. For band alignment at the SiO2/SiC interface, the valence and conduction band-offsets (∆Ev and ∆Ec, respectively) determine the device performance. We employed hard x-ray photoelectron spectroscopy (HAXPES) to determine the band-offset of SiO2/4H-SiC (000-1) structures prepared by different thermal oxidation procedures. We investigated the relationships between the band-offset, the gate leakage current, and the interface states density at the SiO2/4H-SiC (000-1) interface
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