Abstract
AbstractAs discussed in the previous chapter, process, voltage and temperature variations as well as aging significantly affect the timing of digital circuits. To cope with these uncertainties, worst-case guard-banding is still the most common design approach. As the worst-case is very rare however, in most cases power or performance is wasted by this approach.By scaling the operating voltage, energy efficiency can be increased. Tuning the supply voltage dependent on PVTA variations is referred to as adaptive voltage scaling (AVS). The term AVS is often interchanged with dynamic voltage scaling (DVS), but note that DVS considers only varying workloads and does not adapt to PVTA variations at all. To clarify the difference between both techniques, they are explained in the following two sections.KeywordsAdaptive Voltage Scaling (AVS)Dynamic Voltage Scaling (DVS)Common Design ApproachPath ReplicaRazor Flip-flopThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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