Abstract
Major changes have taken place in the global integrated circuit industry, and various emerging technologies have promoted the development of chips in the direction of smaller size and larger scale. Verification is the key line of defense to ensure the correct realization of chip functions. Verification also takes up a lot of time in the actual chip project cycle. Improving verification efficiency is of great significance to reducing chip costs. Universal Serial Bus IIC (Inter-Integrated Circuit) has the simple structure of two-way and double-wire, unique data transmission mode and its wide use in system-on-chip. This paper presents a design and implementation of IIC protocol based on Verilog language using Modelsim simulation software. The IIC protocol is a serial communication protocol used for data transfer between electronic devices. The paper provides a detailed introduction to the principles, communication process, and data format of the IIC protocol, and proposes a Verilog-based design solution. Through Modelsim simulation, the correctness and reliability of the design are verified
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