Design and Development of High-speed Data Acquisition System with Cyclone FPGA

Abstract

The use of an automated Data Acquisition System (DAS) is very important in testing and measurement systems. The desire is extremely high in the DAS with high speed, multi-channel, and large capacity, so research in this area becomes very significant. The growing problem in DAS is to acquire the data with the required data rate and store data onto the on-chip memory. Microcontroller, microprocessor or Digital Signal Processors (DSP) devices can be programmed as a DAS, but these devices comprise problems, such as slower data acquisition rates, nonavailability of sufficient on-chip memory, etc. To overcome these above drawbacks, this paper provides an approach to design and develop DAS based on the Field Programmable Gate Array (FPGA). To acquire the data from Analog to Digital Converter (ADC) to FPGA, an Inter Integrated Circuit (I2C) serial communication protocol is used. I2C master communication protocol is designed and developed using VHDL with the Quartus II version 13.1, and the I2C master protocol is implemented in cyclone III FPGA. FPGA is acting as a master controller. DAS with the FPGA will provide the better acquisition results compared to the existing acquisition system.