Abstract

We study the impact of the atomic layer deposition high-k gate insulators on metal–oxide–semiconductor (MOS) interface properties of Si0.78Ge0.22 gate stacks with TiN gate electrodes and the physical origins of the reduction in MOS interface defects. The SiGe MOS interface properties of TiN/Y2O3, Al2O3, HfO2, and ZrO2 gate stacks are compared over a wide range of annealing temperatures. It is found that the lowest interface trap density (Dit) is obtained by TiN/Y2O3 stacks with post-metallization annealing (PMA) at 450 °C among the gate stacks with other gate insulators. Moreover, it is revealed that less amount of GeOx in the interfacial layer leads to lower Dit and that the Y2O3 stacks yield further reduction in Dit during PMA at 450 °C. These results can be explained by the reduction in distorted Ge–O bond densities in GeOx in ILs by scavenging and annealing effects during PMA and the suppression of Ge dangling bond generation by incorporating Y atoms into GeOx during PMA at 450 °C.

Highlights

  • SiGe has been one of the most realistic channel materials of fin field-effect transistors (FinFETs) and gate-all-around field-effect transistors (GAAFETs) for advanced technology nodes owing to its higher mobility than Si

  • We have recently reported the improvement of SiGe MOS interface properties by employing TiN/atomic layer deposition (ALD) Y2O3 gate stacks with post-metallization annealing (PMA) at 450 ○C12 and have investigated the physical origin of the reduction in Dit of Y2O3/SiGe gate stacks by changing PMA temperature,13 oxidized interfacial layer (IL),13 metal gate electrodes,14 and trimethylaluminum (TMA) pre-treatments

  • TiN is used as the common metal gate because we have reported that TiN gate electrodes in metal/Y2O3/SiGe gate stacks can suppress the degradation of Y2O3, leading to less amount of GeOx in the interfacial layer (IL) after PMA,9,10 whereas W and Au gate scitation.org/journal/adv electrodes cannot realize

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Summary

INTRODUCTION

SiGe has been one of the most realistic channel materials of fin field-effect transistors (FinFETs) and gate-all-around field-effect transistors (GAAFETs) for advanced technology nodes owing to its higher mobility than Si. It is known, that the mobility and sub-threshold swing of SiGe MOSFETs are degraded by a high interface trap density (Dit) at SiGe metal–oxide–semiconductor (MOS) interfaces. SiGe has been one of the most realistic channel materials of fin field-effect transistors (FinFETs) and gate-all-around field-effect transistors (GAAFETs) for advanced technology nodes owing to its higher mobility than Si.1–3 It is known, that the mobility and sub-threshold swing of SiGe MOSFETs are degraded by a high interface trap density (Dit) at SiGe metal–oxide–semiconductor (MOS) interfaces. The impacts of ALD high-k films on the SiGe MOS interface properties including Dit of Y2O3, Al2O3, HfO2, and ZrO2 gate stacks are systematically examined with changing PMA temperature. The physical origins of the Dit reduction in the TiN/Y2O3/SiGe MOS interface are re-examined from the viewpoint of compositions of interfacial layers (ILs) and structures of Ge oxides in ILs of the ALD high-k/SiGe stacks after PMA Scitation.org/journal/adv electrodes cannot realize. the physical origins of the Dit reduction in the TiN/Y2O3/SiGe MOS interface are re-examined from the viewpoint of compositions of interfacial layers (ILs) and structures of Ge oxides in ILs of the ALD high-k/SiGe stacks after PMA

EXPERIMENTAL PROCEDURES
Evaluation of MOS interface properties
RESULTS AND DISCUSSION
CONCLUSION
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