Metal–oxide–semiconductor interface properties of TiN/Y2O3/Si0.62Ge0.38 gate stacks with high temperature post-metallization annealing

Abstract

We investigate the influence of an interfacial layer (IL) formed by plasma pre-oxidation on atomic layer deposition TiN/Y2O3/Si0.62Ge0.38 metal–oxide–semiconductor (MOS) gate stacks on the electrical characteristics of the MOS interfaces in order to examine the physical mechanism of the interface trap density (Dit) of SiGe MOS interfaces. The post-metallization annealing (PMA) temperature significantly decreases Dit. It is found that, at any PMA temperature, Dit at the MOS interfaces without pre-oxidation is lower than that with pre-oxidation. The low Dit value of 7 × 1011 eV−1 cm−2 is obtained for TiN/Y2O3/SiGe without pre-oxidation after PMA at 450 °C. It is revealed that the ILs of TiN/Y2O3 stacks with and without pre-oxidation after PMA consist mainly of YSiOx/SiGeOx and YSiOx, respectively. The physical origins of reduction in Dit without pre-oxidation and after PMA are attributable to the reduction in the amount of Ge–O bonds at the interface and an annealing effect of distorted Ge–O bonds, respectively.