Abstract
Dual supply voltage (DSV) is a low-power design technique, which reduces the dynamic power dissipation of a digital circuit [1]. In this paper we will summarize the basic idea of this approach, its benefit and associated costs and outline the dependency of DSV on technology and device parameters. We then evaluate the use of DSV on gate level in the context of the evolving ultra deep submicron (UDSM) technology. Employing DSV exhibits a reduced leverage – especially for leakage sensitive applications – mainly due to a limited reduction of threshold voltages in UDSM technologies and due to the use of multi-threshold devices. Finally we discuss DSV design examples reported in literature and give an outlook on how their benefit is influenced by UDSM technologies.
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