Reconfiguration of hexagonal arrays by diagonal deletion

Abstract

This paper describes various algorithms for dynamic reconfiguration of VLSI hexagonal arrays. These algorithms are applicable to arrays in which reconfiguration requires logical deletion of the diagonal front of computation. Initially it is proven that the intuitive, but rather naive approach of diagonal deletion is not correct, because it does guarantee the generation of the correct dimensions in the target array. A new approach based on geometrical considerations is proposed. Theorems that preserve the dimensions of the desired target array, are presented. Two reconfiguration algorithms are presented. These algorithms have linear time-complexity with respect to the dimensions of the array. The innovative features of this approach are the dependence of reconfiguration on the dimensions of the array to be reconfigured and a better exploitation of redundancy for run-time reconfiguration. Simple switching circuits are described. It is proved that silicon overhead consists of four two-by-two Banyan switches per cell. Illustrative examples are presented.