Reconfigurable intra prediction hardware for future video coding

Abstract

In this paper, two Future Video Coding (FVC) reconfigurable intra prediction hardware are proposed. They are the first FVC intra prediction hardware in the literature. The first hardware implements multiplications with constants using adders and shifters instead of using multipliers. Therefore, it can be used in ASIC implementations of FVC encoders. The second hardware implements multiplications with constants using DSP blocks in FPGA. Therefore, it can be used in FPGA implementations of FVC encoders.