Reconfigurable hardware architecture for saving power consumption on a sensor node

Abstract

We propose the use of a reconfigurable hardware architecture to reduce the power consumption of small sensor node that has various sensors and wireless communication facilities, that were the result of an adaptive function specialization mechanism. Traditional sensor nodes must have had a powerful and multi functional Micro-Controller Unit (MCU) to satisfy the requirements for processing any kinds of application. However, most of these systems only use a part of the functions provided by an MCU. In other words, such a unit often consumes a great dead of power for unused circuits. To avoid this situation, we propose the use of a reconfigurable architecture based on a Field Programmable Gate Array (FPGA) instead of an MCU because this array dynamically changes the circuit to the optimal one that is just used for the calculation required by an application. Moreover, we implemented a prototype system to do a preliminary evaluation of our proposed mechanism. In this evaluation, we show the performance of our proposed reconfigurable architecture by comparison with traditional architecture that uses processing time and power consumption. The experimental result shows that our proposed mechanism reduces enough power of its sensor nodes to prolong the lifetime of nodes without decreasing the processing time.