Cost-and power optimized FPGA based system integration

Abstract

The application of field programmable gate arrays (FPGAs) in low power and low cost industrial mass products has become an important issue for designers of electronic systems. The flexibility and performance offered by reconfigurable hardware architectures often stands in the opposite to increased power consumption in comparison to application specific integrated circuit (ASIC) solutions. By exploiting the flexibility of reconfigurable hardware architectures, e.g. the capability of run-time HW reconfiguration of some modern FPGA devices, power consumption of FPGA-based solutions can be further decreased. This paper presents an approach for cost- and power optimized system integration of a low-power capacity-based measurement system by exploiting the dynamic and partial reconfiguration capability of Xilinx FPGAs.