RECENT PROGRESS IN 40- TO 100-GBIT/S-CLASS OPTICAL COMMUNICATIONS ICS USING INP-BASED HBT TECHNOLOGIES

Abstract

This paper describes our InP-based heterojunction bipolar transistor (HBT) technologies and circuit design techniques for small-scale-integration (SSI) and medium-scale-integration (MSI) circuits for 40- to 100-Gbit/s-class optical communications systems. The circuits include a sub-4-ps emitter-coupled logic (ECL) gate, 100-Gbit/s selector circuit, 90-Gbit/s decision circuit, 50-Gbit/s 4:1 multiplexer (MUX) and 1:4 demultiplexer (DEMUX) ICs, aver-40-Gbit/s 16:1 MUX IC, and 40-Gbit/s full-clock-rate DEMUX with a clock and data recovery (CDR) circuit. This paper demonstrates that InP-based HBT technologies and our circuit design techniques are attractive for fabricating ultrahigh-speed SSI circuits with data rates approaching 100 Gbit/s and low-power MSI circuits with data rates of over 40 Gbit/s.