Abstract

It is argued that the practical realization of n-valued logic (n>or=3) built-in testing circuits is not an obvious extension of the binary case. To support this claim, the implementation of a testing technique for ternary CMOS VLSI circuits is presented. A three-valued logic built-in logic block observer (BILBO) has been engineered to operate in four modes: reset, normal, scan path, and signature analysis. The main objective is to provide a method of design and implementation of three-valued logic circuits that are easy to test and able to test themselves. BILBO allows both random testing (signature analysis) and deterministic testing (selected test vectors).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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