Realization and characterization of nano-scale FinFET devices

Abstract

The double gate transistor is regarded as the ultimate device for future CMOS technologies because the excellent channel control suppresses leakage currents and the two channels enable roughly a doubling of the on-current. We have focused on the FinFET type double gate transistor because of its straightforward fabrication emanating from a planar device process flow. For the ultra-fine structures of the fin (active area) and the gate, optical lithography is substituted by SEM based direct write electron beam lithography with <20 nm resolution. Pattern transfer is accomplished by high density plasma etching using hard masks and subsequent resist free silicon patterning with a high density HBr/O2 plasma. Together with standard CMOS production processes we have fabricated and electrically characterized FinFET devices with dimensions down to 20 nm gate length and 15 nm fin width. The output characteristics show excellent on-currents of 1.1 mA/μm for the n-MOS and 500 μA/μm for the p-MOS transistors.