Abstract
Change detection is one of the several important problems in the design of any automated video surveillance system. Appropriate selection of frames of significant changes can minimize the communication and processing overheads for such systems. This research presents the design of a VLSI architecture for change detection in a video sequence and its implementation on Virtex-IIPro FPGA platform. Clustering-based scheme is used for change detection. The proposed system is designed to meet the real-time requirements of video surveillance applications. It robustly detects the changes in a video stream in real time at 25 frames per second (fps) in gray scale CIF size video.
Highlights
Automated video surveillance systems are gaining importance due to their capability of performing automatic scene analysis
The software implementation of change detection algorithm running on general purpose processors could not achieve the frame rates required for real-time processing of a video stream for surveillance applications
This paper presents the design of a VLSI architecture for real-time change detection in a video stream and its Field programmable gate array (FPGA) implementation
Summary
Automated video surveillance systems are gaining importance due to their capability of performing automatic scene analysis. The software implementation of change detection algorithm running on general purpose processors could not achieve the frame rates required for real-time processing of a video stream for surveillance applications. The main advantages of FPGAs (field programmable gate arrays) over ASIC and ASIP are their ability to allow modification in the design in later stages of system development, architectural efficiency in terms of parallelism, shorter design time, cost efficiency, and real-time performance (high throughput). These features make FPGAs a suitable choice for implementing change detection in real time.
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