Real time implementation of a novel chaotic generator on FPGA

Abstract

In this study, a new continuous-time autonomous chaotic system has been presented and implemented on FPGA. Presented a new chaotic system has been designed using the IEEE 754-1985 floating-point format and implemented using Heun algorithm with VHDL language. The designed system has been synthesized and tested on Xilinx Virtex-6 FPGA chip. According to the test results, operation frequency of the FPGA-based a new chaotic signal generator is certain as 390 MHz and performance results have been given with chip statistics. In addition, the results obtained from FPGA-based new chaotic generator have been compared with the Matlab-based numerical results and it has been observed that obtained results are successful. By the developed FPGA-based novel chaotic system model, chaos-based various engineering applications such as true random number generation and secure communication system can be performed.