Abstract

In this paper, we report about the derivation of a physics-based compact model of random telegraph noise (RTN) in HfO2-based resistive random access memory (RRAM) devices. Starting from the physics of charge transport, which is different in the high resistive states and low resistive states, we explore the mechanisms responsible for RTN exploiting a hybrid approach, based on self-consistent physics simulations and geometrical simplifications. Then, we develop a simple yet effective physics-based compact model of RTN valid in both states, which can be steadily integrated in state-of-the-art RRAM compact models. The RTN compact model predictions are validated by comparison with both a large experimental data set obtained by measuring RRAM devices in different conditions, and data reported in the literature. In addition, we show how the model enables advanced circuit simulations by exploring three different circuits for memory, security, and logic applications.

Highlights

  • T HE relentless scaling of Complementary Metal Oxide Semiconductor (CMOS) technology is increasing the importance of phenomena associated with charge trapping/detrapping at discrete defect sites, such as Stress-Induced Leakage Current (SILC) [1,2,3], Bias Temperature Instability (BTI) [4,5,6], and Random Telegraph Noise (RTN) [7,8,9,10]

  • We proposed a compact model for RTN in Resistive Random Access Memory (RRAM), valid in both resistive states, that correctly captures the statistics of the RTN properties and the variability in the number of defects contributing to the RTN [31]

  • We developed a physics-based compact model for RTN in RRAM, valid in both HRS and LRS, by combining refined physics-based simulations with reasonable geometrical simplifications

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Summary

INTRODUCTION

T HE relentless scaling of Complementary Metal Oxide Semiconductor (CMOS) technology is increasing the importance of phenomena associated with charge trapping/detrapping at discrete defect sites (either pre-existing in the virgin device or induced by stress), such as Stress-Induced Leakage Current (SILC) [1,2,3], Bias Temperature Instability (BTI) [4,5,6], and Random Telegraph Noise (RTN) [7,8,9,10]. We proposed a compact model for RTN in RRAM, valid in both resistive states, that correctly captures the statistics of the RTN properties (i.e., variations in amplitude and transition times) and the variability in the number of defects contributing to the RTN [31]. This model, implemented in Verilog-A, can be plugged in existing RRAM device models [13, 32,33,34,35,36], extending their potential. We show how the proposed model enables: i) estimating the effect of RTN on the resistive states distribution; ii) evaluating how the randomness of a RRAM-based PUF circuit is affected by the presence of RTN; iii) designing the building block of an advanced RTN-based RNG circuit

Devices and Experiments
Simulations
CHARGE TRANSPORT IN HFO2 RRAM
Charge Transport in LRS
Charge Transport in HRS
THE RANDOM TELEGRAPH NOISE MODEL
RTN Amplitude Statistical Model in HRS
RTN Amplitude Statistics Model in LRS
RTN Capture and Emission Times
Model Validation and Implementation
APPLICATIONS AND CIRCUIT DESIGN
RTN-aware Design of Multi-bit Memory Circuits
The impact of RTN on a 128-bit RRAM-based PUF
Design of an RTN-based RNG Circuit
CONCLUSIONS

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