Abstract
A program was undertaken to radiation harden AT&T's existing power integrated circuit technology (BCDMOS). The BCDMOS technology is described. The radiation hardening approach is outlined. The modifications made to standard technology in an effort to harden the CMOS, DMOS, and NPN devices to four radiation environments (total dose, dose rate, single event upset (SEU), and neutrons) are discussed. Steps taken improve the performance of these devices to meet the circuit requirements are described. The tradeoffs involving the different devices and the different radiation environments are discussed. Initial results indicate a substantial improvement in hardness over existing commercial technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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