Quasi-static capacitance–voltage characterizations of carrier accumulation and depletion phenomena in pentacene thin film transistors

Abstract

We analyze charge accumulation and depletion behaviors from C–V curves at various gate voltages, ramp rates and sweep directions in pentacene OTFTs. The polycrystalline property of the pentacene layer has lead to carrier charge and discharge processes in the channel layer by a trap-controlled transport mechanism. We apply such processes to describe C–V profiles at various ramp rates. Hysteresis can be observed from C–V curves at faster ramp rates. The phenomenon can be attributed to the difference of the relaxation time of carrier trap and detrap processes. As the ramp rate becomes slower, hysteresis disappears since most carriers are able to interact with the gate stress. And beyond this ramp rate, the corresponding threshold voltages are then kept at constant values, despite the existence of traps. Furthermore, low-mobility carriers (mobile ions or impurities) participate in the charge accumulation and depletion when the ramp rate is even slower, which results in a skew of C–V profiles. Finally, we extend the C–V measurement to devices with different channel lengths.