Abstract
This paper presents the experimental characteristics of 3-state n-MOS inverters utilizing Quantum Dot Gate (QDG) FETs. By employing FETs that have quantum dots in the gate region, particularly Si-SiOx cladded quantum dots and Ge-GeOx cladded quantum dots, intermediate states were observed in both variations of the device, both of which using the same architecture and mask set.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: International Journal of High Speed Electronics and Systems
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
