Abstract

This article explores the basic design methodology of a 4-bit binary right shifter circuit and its implementation based on a QCA nano-device. The right shifter circuit can shift a single bit of an input message. The proposed shifter has been reorganized to function as a logical, arithmetic, and circular right shifter. Single-layer wire intersection has been utilized to give the most straightforward execution of the plans. These designs are helpful in floating-point handling frameworks, incredibly exceptionally valuable for the mantissa multiplication procedure. The design correctness is confirmed by contrasting hypothetical qualities and relating simulation results. The shifter consumes 435 QCA cells, 0.89µm2 area with a latency of 1.75, and a circuit cost of 264.06. The design is compared with other shifters in terms of design complexities. The design has 0.628eV energy consumption at tunneling energy level 1.0Ek (kink energy). But it consumes only 0.190eV energy to perform multifunction shifting operations.

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